Occasion YOKOGAWA ST 6730 #9034562 à vendre en France

YOKOGAWA ST 6730
Fabricant
YOKOGAWA
Modèle
ST 6730
ID: 9034562
Tester Configuration: S1(eng)> dm inst [ Installed modules display ] pin map | 1 2 3 4 5 6 |1234567890123456 7890123456789012 3456789012345678 9012345678901234 [NSIO]-------------------------------------------------------------------------- 1- 64|1111111111111111 1111111111111111 1111111111111111 ................ 65- 128|1111111111111111 1111111111111111 1111111111111111 ................ 129- 192|1111111111111111 1111111111111111 1111111111111111 ................ 193- 256|1111111111111111 1111111111111111 1111111111111111 ................ [HSIO]-------------------------------------------------------------------------- 257- 304|1111111111111111 1111111111111111 ................ pin map | 1 2 3 4 5 6 |1234567890123456 7890123456789012 3456789012345678 9012345678901234 [DIHD]-------------------------------------------------------------------------- 513- 576|1111111111111111 1111111111111111 1111111111111111 1111111111111111 577- 640|1111111111111111 1111111111111111 1111111111111111 1111111111111111 Continue? (y/n)S1 Any Keyin> y LCDPIN | 1 2 3 4 map |123456789012 345678901234 567890123456 789012345678 ------------------------------------------------------------- 1001-1048|111111111111 111111111111 111111111111 111111111111 1049-1096|111111111111 111111111111 111111111111 111111111111 1097-1144|111111111111 111111111111 111111111111 111111111111 1145-1192|111111111111 111111111111 111111111111 111111111111 1193-1240|111111111111 111111111111 111111111111 111111111111 1241-1288|111111111111 111111111111 111111111111 111111111111 1289-1336|111111111111 111111111111 111111111111 111111111111 1337-1384|111111111111 111111111111 111111111111 111111111111 1385-1432|111111111111 111111111111 111111111111 111111111111 1433-1480|111111111111 111111111111 111111111111 111111111111 1481-1528|111111111111 111111111111 111111111111 111111111111 1529-1576|111111111111 111111111111 111111111111 111111111111 1577-1624|111111111111 111111111111 111111111111 111111111111 1625-1672|111111111111 111111111111 111111111111 111111111111 1673-1720|111111111111 111111111111 111111111111 111111111111 1721-1768|111111111111 111111111111 111111111111 111111111111 1769-1816|111111111111 111111111111 111111111111 111111111111 1817-1864|111111111111 111111111111 111111111111 111111111111 1865-1912|111111111111 111111111111 111111111111 111111111111 1913-1960|111111111111 111111111111 111111111111 111111111111 1961-2008|111111111111 111111111111 111111111111 111111111111 2009-2056|111111111111 111111111111 111111111111 111111111111 2057-2104|111111111111 111111111111 111111111111 111111111111 2105-2152|111111111111 111111111111 111111111111 111111111111 2153-2200|111111111111 111111111111 111111111111 111111111111 2201-2248|111111111111 111111111111 111111111111 111111111111 2249-2296|111111111111 111111111111 111111111111 111111111111 2297-2344|111111111111 111111111111 111111111111 111111111111 Continue? (y/n)S1 Any Keyin> y | 1 2 3 4 |CH 123456789012 345678901234 567890123456 789012345678 ------------+-------------------------------------------------------- PMU |20 111.111.111. 111.11111111 LCDPMU 1-48|96 111111111111 111111111111 111111111111 111111111111 49-96| 111111111111 111111111111 111111111111 111111111111 RVI 1-48|48 111111111111 111111111111 111111111111 111111111111 49-72| ............ ............ UVI | 8 11111111 CBIT |32 111111111111 111111111111 11111111 UVI map|12345678 -------+-------- map |11111111 fail |........ HDOT :1 XYCD :. GPIB :1 OT :. RBIT :. Continue? (y/n)S1 Any Keyin> | imple id rev memorytype memsize/bank bank softrev fail/. ------------+------------------------------------------------------------------- NSIO 1 | 1 6 4 256M 67108864words 1 0 . NSIO 2 | 1 6 4 256M 67108864words 1 0 . NSIO 3 | 1 6 4 256M 67108864words 1 0 . NSIO 4 | . NSIO 5 | 1 6 4 256M 67108864words 1 0 . NSIO 6 | 1 6 4 256M 67108864words 1 0 . NSIO 7 | 1 6 4 256M 67108864words 1 0 . NSIO 8 | . HSIO 1 | 1 1 0 128M 16777216words 1 0 . HSIO 2 | 1 1 0 128M 16777216words 1 0 . HSIO 3 | . DIHD 1 | 1 1 4 . . . 0 . DIHD 2 | 1 1 4 . . . 0 . Continue? (y/n)S1 Any Keyin> | imple id rev memorytype memsize/bank bank softrev fail/. ------------+------------------------------------------------------------------- LLCD 1 | 1 4 0 256M 2097152words 1 5 . LLCD 2 | 1 4 0 256M 2097152words 1 5 . LLCD 3 | 1 4 0 256M 2097152words 1 5 . LLCD 4 | 1 4 0 256M 2097152words 1 5 . LLCD 5 | 1 4 0 256M 2097152words 1 5 . LLCD 6 | 1 4 0 256M 2097152words 1 5 . LLCD 7 | 1 4 0 256M 2097152words 1 5 . LLCD 8 | 1 4 0 256M 2097152words 1 5 . LLCD 9 | 1 4 0 256M 2097152words 1 5 . LLCD 10 | 1 4 0 256M 2097152words 1 5 . LLCD 11 | 1 4 0 256M 2097152words 1 5 . LLCD 12 | 1 4 0 256M 2097152words 1 5 . LLCD 13 | 1 4 0 256M 2097152words 1 5 . LLCD 14 | 1 4 0 256M 2097152words 1 5 . LLCD 15 | 1 4 0 256M 2097152words 1 5 . LLCD 16 | 1 4 0 256M 2097152words 1 5 . LLCD 17 | 1 4 0 256M 2097152words 1 5 . LLCD 18 | 1 4 0 256M 2097152words 1 5 . LLCD 19 | 1 4 0 256M 2097152words 1 5 . LLCD 20 | 1 4 0 256M 2097152words 1 5 . LLCD 21 | 1 4 0 256M 2097152words 1 5 . Continue? (y/n)S1 Any Keyin> | imple id rev memorytype memsize/bank bank softrev fail/. -------------------------------------------------------------------------------- LLCD 22 | 1 4 0 256M 2097152words 1 5 . LLCD 23 | 1 4 0 256M 2097152words 1 5 . LLCD 24 | 1 4 0 256M 2097152words 1 5 . LLCD 25 | 1 4 0 256M 2097152words 1 5 . LLCD 26 | 1 4 0 256M 2097152words 1 5 . LLCD 27 | 1 4 0 256M 2097152words 1 5 . LLCD 28 | 1 4 0 256M 2097152words 1 5 . LPMU 1 | 1 1 3 . . . 0 . LPMU 2 | 1 1 3 . . . 0 . LPMU 3 | 1 1 3 . . . 0 . LPMU 4 | 1 1 3 . . . 0 . LRVI 1 | 1 1 2 . . . 0 . LRVI 2 | 1 1 2 . . . 0 . LRVI 3 | . LIDDQ 1 | 1 3 0 . . . 1 . LIDDQ 2 | 1 3 0 . . . 1 . DCREFT | 1 1 3 . . . 2 . Continue? (y/n)S1 Any Keyin> | imple id rev memorytype memsize/bank bank softrev fail/. ------------+------------------------------------------------------------------- GSLM-A | 1 2 0 . . . 0 . GSTR | 1 . 0 . . . 1 . LSTM | 1 1 2 . . . - . PAC1 | 1 6 1 256M 67108864words 1 0 . PAC2 | 1 6 1 256M 67108864words 1 0 . PACN | 1 6 1 256M 67108864words 1 0 . NSMC | 1 1 3 256M 67108864words 1 1 . LMIF | 1 1 1 256M 67108864words 1 0 . GSTRPC | . | imple address -------------------------------------------------------------------------------- ARRAYUNIT(TSC)| 1 127.0.0.1 S1(eng)> Level3 Diag: <<<===== diag nsdutpath =====>>> <Integrated result log> NSIO DUT Path Test(diag nsdutpath)------------------------------- <PASS> Start Time:2013/07/20 15:14:29 End Time:2013/07/20 15:14:44 Exec Diag Level:3 Diag Ver:V1.01 Station-Number:1 TesterID:ST01 1:DUT Path------------------------------------------------- <PASS> 2:Path Resistance------------------------------------------ <PASS> <Fail data> Fail data does not exist! <<<===== diag hsdutpath =====>>> <Integrated result log> HSIO DUT Path Test(diag hsdutpath)------------------------------- <PASS> Start Time:2013/07/20 15:15:07 End Time:2013/07/20 15:15:10 Exec Diag Level:3 Diag Ver:V1.01 Station-Number:1 TesterID:ST01 1:DUT Path------------------------------------------------- <PASS> 2:Path Resistance------------------------------------------ <PASS> <Fail data> Fail data does not exist! <<<===== diag dfdutpath =====>>> <Integrated result log> DIHD DUT Path Test(diag dfdutpath)------------------------------- <PASS> Start Time:2013/07/20 15:15:17 End Time:2013/07/20 15:15:20 Exec Diag Level:3 Diag Ver:V1.03 Station-Number:1 TesterID:ST01 1:DUT Path------------------------------------------------- <PASS> 2:Path Resistance------------------------------------------ <PASS> <Fail data> Fail data does not exist! <<<===== diag rvidutpath =====>>> <Integrated result log> RVI DUT Path Test(diag rvidutpath)------------------------------- <PASS> Start Time:2013/07/20 15:15:26 End Time:2013/07/20 15:15:27 Exec Diag Level:3 Diag Ver:V1.02 Station-Number:1 TesterID:ST01 1:DUT Path------------------------------------------------- <PASS> 2:Path Resistance------------------------------------------ <PASS> <Fail data> Fail data does not exist! <<<===== diag uvidutpath =====>>> <Integrated result log> UVI DUT Path Test(diag uvidutpath)------------------------------- <PASS> Start Time:2013/07/20 15:15:58 End Time:2013/07/20 15:16:06 Exec Diag Level:3 Diag Ver:V1.02R3 Station-Number:1 TesterID:ST01 1:DUT Path------------------------------------------------- <PASS> 2:Path Resistance------------------------------------------ <PASS> <Fail data> Fail data does not exist! <<<===== diag lcddutpath =====>>> <Integrated result log> LCD DUT Path Test(diag lcddutpath)------------------------------- <PASS> Start Time:2013/07/20 15:16:12 End Time:2013/07/20 15:17:38 Exec Diag Level:3 Diag Ver:V1.02R2 Station-Number:1 TesterID:ST01 1:DUT Path------------------------------------------------- <PASS> 2:Path Resistance------------------------------------------ <PASS> <Fail data> Fail data does not exist! <<<===== diag pdmdutpath =====>>> <Integrated result log> PDM DUT Path Test(diag pdmdutpath)------------------------------- <PASS> Start Time:2013/07/20 15:18:53 End Time:2013/07/20 15:18:54 Exec Diag Level:3 Diag Ver:V1.01 Station-Number:1 TesterID:ST01 1:DUT Path------------------------------------------------- <PASS> <Fail data> Fail data does not exist! <<<===== diag refdutpath =====>>> <Integrated result log> Reference DUT Path Test(diag refdutpath)------------------------- <PASS> Start Time:2013/07/20 15:19:00 End Time:2013/07/20 15:19:00 Exec Diag Level:3 Diag Ver:V1.04 Station-Number:1 TesterID:ST01 1:GVG Reference Output Path-------------------------------- <PASS> 3:LS Input Path-------------------------------------------- <PASS> <Fail data> Fail data does not exist! <<<===== diag iddqdutpath =====>>> <Integrated result log> IDDQ DUT Path Test(diag iddqdutpath)----------------------------- <PASS> Start Time:2013/07/20 15:19:07 End Time:2013/07/20 15:19:07 Exec Diag Level:3 Diag Ver:V1.01R2 Station-Number:1 TesterID:ST01 1:DUT Path------------------------------------------------- <PASS> <Fail data> Fail data does not exist! <<<===== diag dfrly =====>>> <Integrated result log> DIHD Relay Test(diag dfrly)-------------------------------------- <PASS> Start Time:2013/07/20 15:19:13 End Time:2013/07/20 15:19:16 Exec Diag Level:3 Diag Ver:V1.01 Station-Number:1 TesterID:ST01 1:DIHDENB Relay-------------------------------------------- <PASS> <Fail data> Fail data does not exist! <<<===== diag lcdpmurly =====>>> <Integrated result log> LCDPMU Relay Test(diag lcdpmurly)-------------------------------- <PASS> Start Time:2013/07/20 15:19:22 End Time:2013/07/20 15:19:41 Exec Diag Level:3 Diag Ver:V1.01R2 Station-Number:1 TesterID:ST01 1:DIR Relay------------------------------------------------ <PASS> 2:MTX Relay------------------------------------------------ <PASS> 3:LINE Relay----------------------------------------------- <PASS> <Fail data> Fail data does not exist! <<<===== diag rvirly =====>>> <Integrated result log> RVI Relay Test(diag rvirly)-------------------------------------- <PASS> Start Time:2013/07/20 15:19:47 End Time:2013/07/20 15:19:49 Exec Diag Level:3 Diag Ver:V1.01R2 Station-Number:1 TesterID:ST01 1:DIR Relay------------------------------------------------ <PASS> 2:MTX Relay------------------------------------------------ <PASS> 3:LINE Relay----------------------------------------------- <PASS> <Fail data> Fail data does not exist! <<<===== diag iddqrly =====>>> <Integrated result log> IDDQ Relay Test(diag iddqrly)------------------------------------ <PASS> Start Time:2013/07/20 15:19:56 End Time:2013/07/20 15:19:58 Exec Diag Level:3 Diag Ver:V1.01R2 Station-Number:1 TesterID:ST01 1:DUVIHF Rly On Resistance--------------------------------- <PASS> 2:LUVIHF Rly On Resistance--------------------------------- <PASS> 3:LIDDQHF Rly On Resistance-------------------------------- <PASS> 4:IDDQABHF Rly On Resistance------------------------------- <PASS> 5:L2JUMPHF Rly On Resistance------------------------------- <PASS> 6:L4JUMPHF Rly On Resistance------------------------------- <PASS> <Fail data> Fail data does not exist! <<<===== diag lcdpmupath =====>>> <Integrated result log> LCDPMU Path Test(diag lcdpmupath)-------------------------------- <PASS> Start Time:2013/07/20 15:20:04 End Time:2013/07/20 15:20:06 Exec Diag Level:3 Diag Ver:V1.01R2 Station-Number:1 TesterID:ST01 1:LCDPMU Internal Path------------------------------------- <PASS> 2:LCDPMU Guard Path---------------------------------------- <PASS> <Fail data> Fail data does not exist! <<<===== diag rvipath =====>>> <Integrated result log> RVI Path Test(diag rvipath)-------------------------------------- <PASS> Start Time:2013/07/20 15:20:13 End Time:2013/07/20 15:20:15 Exec Diag Level:3 Diag Ver:V1.02R2 Station-Number:1 TesterID:ST01 1:RVI Internal Path---------------------------------------- <PASS> 2:RVI Guard Path------------------------------------------- <PASS> <Fail data> Fail data does not exist! <<<===== diag lcdpath =====>>> <Integrated result log> LCD DC Path Test(diag lcdpath)----------------------------------- <PASS> Start Time:2013/07/20 15:20:21 End Time:2013/07/20 15:23:23 Exec Diag Level:3 Diag Ver:V1.03 Station-Number:1 TesterID:ST01 1:LCD DC Path---------------------------------------------- <PASS> 2:LCDCARD Path--------------------------------------------- <PASS> 3:LCDCARD RLYOFF------------------------------------------- <PASS> <Fail data> Fail data does not exist! <<<===== diag iddqpath =====>>> <Integrated result log> IDDQ Path Test(diag iddqpath)------------------------------------ <PASS> Start Time:2013/07/20 15:23:30 End Time:2013/07/20 15:23:31 Exec Diag Level:3 Diag Ver:V1.01 Station-Number:1 TesterID:ST01 1:IDDQ Internal Path--------------------------------------- <PASS> <Fail data> Fail data does not exist! <<<===== diag sysdcpath =====>>> <Integrated result log> System DC Path Test(diag sysdcpath)------------------------------ <PASS> Start Time:2013/07/20 15:23:38 End Time:2013/07/20 15:23:42 Exec Diag Level:3 Diag Ver:V1.02 Station-Number:1 TesterID:ST01 1:UVI-LINE Path-------------------------------------------- <PASS> 2:PDMpath-------------------------------------------------- <PASS> 3:RVI-LINE Path-------------------------------------------- <PASS> 4:LCDPMU-LINE Path----------------------------------------- <PASS> 5:LCD-LINE Path-------------------------------------------- <PASS> 6:I/O Calibration Path------------------------------------- <PASS> 7:LCDMTX Jump Path----------------------------------------- <PASS> <Fail data> Fail data does not exist! <<<===== diag syslcdpath =====>>> <Integrated result log> System LCD Path Test(diag syslcdpath)---------------------------- <PASS> Start Time:2013/07/20 15:23:48 End Time:2013/07/20 15:23:48 Exec Diag Level:3 Diag Ver:V1.02 Station-Number:1 TesterID:ST01 1:Digitize Data Trans Path.-------------------------------- <PASS> <Fail data> Fail data does not exist! <<<===== diag nsstmpath =====>>> <Integrated result log> NSIO-STM Path Test(diag nsstmpath)------------------------------- <PASS> Start Time:2013/07/20 15:23:55 End Time:2013/07/20 15:24:00 Exec Diag Level:3 Diag Ver:V1.02 Station-Number:1 TesterID:ST01 1:NSIO-STM HCMP Path--------------------------------------- <PASS> 2:NSIO-STM LCMP Path--------------------------------------- <PASS> <Fail data> Fail data does not exist! <<<===== diag hsstmpath =====>>> <Integrated result log> HSIO-STM Path Test(diag hsstmpath)------------------------------- <PASS> Start Time:2013/07/20 15:24:07 End Time:2013/07/20 15:24:07 Exec Diag Level:3 Diag Ver:V1.01 Station-Number:1 TesterID:ST01 1:HSIO-STM HCMP Path--------------------------------------- <PASS> 2:HSIO-STM LCMP Path--------------------------------------- <PASS> <Fail data> Fail data does not exist! <<<===== diag lcdstmpath =====>>> <Integrated result log> LCD-STM Path Test(diag lcdstmpath)------------------------------- <PASS> Start Time:2013/07/20 15:24:14 End Time:2013/07/20 15:24:14 Exec Diag Level:3 Diag Ver:V1.01 Station-Number:1 TesterID:ST01 1:LCD-STM HCMP Path---------------------------------------- <PASS> 2:LCD-STM LCMP Path---------------------------------------- <PASS> <Fail data> Fail data does not exist! <<<===== diag dcreftfunc =====>>> <Integrated result log> DCREFT Function Test(diag dcreftfunc)---------------------------- <PASS> Start Time:2013/07/20 15:24:22 End Time:2013/07/20 15:24:28 Exec Diag Level:3 Diag Ver:V1.01R2 Station-Number:1 TesterID:ST01 1:Power-supply Voltage------------------------------------- <PASS> 2:Internal Ref. Output------------------------------------- <PASS> 3:External Ref. Output------------------------------------- <PASS> 4:PDM Ref. Input------------------------------------------- <PASS> 5:LPMU/LRVI Ref. Output------------------------------------ <PASS> 6:LLCD Ref. Output----------------------------------------- <PASS> 7:MTX Path------------------------------------------------- <PASS> 8:Other Function------------------------------------------- <PASS> <Fail data> Fail data does not exist! <<<===== diag nsfunc =====>>> <Integrated result log> NSIO Function Test(diag nsfunc)---------------------------------- <PASS> Start Time:2013/07/20 15:24:51 End Time:2013/07/20 15:25:23 Exec Diag Level:3 Diag Ver:V1.02 Station-Number:1 TesterID:ST01 1:Pattern Generation--------------------------------------- <PASS> 2:Format Operation----------------------------------------- <PASS> 3:RTTC Operation------------------------------------------- <PASS> 4:Rate RTTC Operation-------------------------------------- <PASS> 5:SQPG Instruction----------------------------------------- <PASS> 6:Fail Test------------------------------------------------ <PASS> <Detailed result log> NSIO Function Test(diag nsfunc) patgen1 : 1:Pattern Generation(Pattern RUN & STOP)----------- <PASS> -------------------------------------- P/F Result Expect -------------------------------------- P Current Address : 16 16 P Cycle Count : 17 17 -------------------------------------- format1 : 2:Format Operation(NRZ(Normal Pattern))------------ <PASS> format2 : 2:Format Operation(RZ (Normal Pattern))------------ <PASS> format3 : 2:Format Operation(R1 (Normal Pattern))------------ <PASS> format4 : 2:Format Operation(SBC(Normal Pattern))------------ <PASS> format5 : 2:Format Operation(NRZ(Double Pattern))------------ <PASS> format6 : 2:Format Operation(RZ (Double Pattern))------------ <PASS> format7 : 2:Format Operation(R1 (Double Pattern))------------ <PASS> format8 : 2:Format Operation(SBC(Double Pattern))------------ <PASS> format9 : 2:Format Operation(NRZ(Triple Pattern))------------ <PASS> format10 : 2:Format Operation(RZ (Triple Pattern))------------ <PASS> format11 : 2:Format Operation(R1 (Triple Pattern))------------ <PASS> rttc1 : 3:RTTC Operation(RTTC Address Bit0)---------------- <PASS> rttc2 : 3:RTTC Operation(RTTC Address Bit1)---------------- <PASS> rttc3 : 3:RTTC Operation(RTTC Address Bit2)---------------- <PASS> rttc4 : 3:RTTC Operation(RTTC Address Bit3)---------------- <PASS> rttc5 : 3:RTTC Operation(RTTC Address Bit4)---------------- <PASS> raterttc1 : 4:Rate RTTC Operation(Rate RTTC Address Bit0)------ <PASS> raterttc2 : 4:Rate RTTC Operation(Rate RTTC Address Bit1)------ <PASS> raterttc3 : 4:Rate RTTC Operation(Rate RTTC Address Bit2)------ <PASS> raterttc4 : 4:Rate RTTC Operation(Rate RTTC Address Bit3)------ <PASS> raterttc5 : 4:Rate RTTC Operation(Rate RTTC Address Bit4)------ <PASS> pginst1 : 5:SQPG Instruction(Pattern Address Trace)---------- <PASS> failtest1 : 6:Fail Test(Operation at PASS)--------------------- <PASS> failtest2 : 6:Fail Test(Operation at FAIL)--------------------- <PASS> <Fail data> Fail data does not exist! <<<===== diag hsfunc =====>>> <Integrated result log> HSIO Function Test(diag hsfunc)---------------------------------- <PASS> Start Time:2013/07/20 15:25:48 End Time:2013/07/20 15:25:55 Exec Diag Level:3 Diag Ver:V1.02 Station-Number:1 TesterID:ST01 1:Pattern Generation--------------------------------------- <PASS> 2:Format Operation----------------------------------------- <PASS> 3:RTTC Operation------------------------------------------- <PASS> 4:Rate RTTC Operation-------------------------------------- <PASS> 5:SQPG Instruction----------------------------------------- <PASS> 6:Fail Test------------------------------------------------ <PASS> <Detailed result log> HSIO Function Test(diag hsfunc) patgen1 : 1:Pattern Generation(Pattern RUN & STOP)----------- <PASS> -------------------------------------- P/F Result Expect -------------------------------------- P Current Address : 16 16 P Cycle Count : 17 17 -------------------------------------- format1 : 2:Format Operation(NRZ(Normal Pattern))------------ <PASS> format2 : 2:Format Operation(RZ (Normal Pattern))------------ <PASS> format3 : 2:Format Operation(R1 (Normal Pattern))------------ <PASS> format4 : 2:Format Operation(SBC(Normal Pattern))------------ <PASS> format5 : 2:Format Operation(NRZ(Double Pattern))------------ <PASS> format6 : 2:Format Operation(RZ (Double Pattern))------------ <PASS> format7 : 2:Format Operation(R1 (Double Pattern))------------ <PASS> format8 : 2:Format Operation(SBC(Double Pattern))------------ <PASS> format9 : 2:Format Operation(NRZ(Triple Pattern))------------ <PASS> format10 : 2:Format Operation(RZ (Triple Pattern))------------ <PASS> format11 : 2:Format Operation(R1 (Triple Pattern))------------ <PASS> rttc1 : 3:RTTC Operation(RTTC Address Bit0)---------------- <PASS> rttc2 : 3:RTTC Operation(RTTC Address Bit1)---------------- <PASS> rttc3 : 3:RTTC Operation(RTTC Address Bit2)---------------- <PASS> rttc4 : 3:RTTC Operation(RTTC Address Bit3)---------------- <PASS> rttc5 : 3:RTTC Operation(RTTC Address Bit4)---------------- <PASS> raterttc1 : 4:Rate RTTC Operation(Rate RTTC Address Bit0)------ <PASS> raterttc2 : 4:Rate RTTC Operation(Rate RTTC Address Bit1)------ <PASS> raterttc3 : 4:Rate RTTC Operation(Rate RTTC Address Bit2)------ <PASS> raterttc4 : 4:Rate RTTC Operation(Rate RTTC Address Bit3)------ <PASS> raterttc5 : 4:Rate RTTC Operation(Rate RTTC Address Bit4)------ <PASS> pginst1 : 5:SQPG Instruction(Pattern Address Trace)---------- <PASS> failtest1 : 6:Fail Test(Operation at PASS)--------------------- <PASS> failtest2 : 6:Fail Test(Operation at FAIL)--------------------- <PASS> <Fail data> Fail data does not exist! <<<===== diag lcdpmufunc =====>>> <Integrated result log> LCDPMU Function Test(diag lcdpmufunc)---------------------------- <PASS> Start Time:2013/07/20 15:26:03 End Time:2013/07/20 15:26:04 Exec Diag Level:3 Diag Ver:V1.01 Station-Number:1 TesterID:ST01 1:ADC Measurement Function--------------------------------- <PASS> <Detailed result log> LCDPMU Function Test(diag lcdpmufunc) measADC1 : 1:ADC Measurement Function(V=0V, RNG=X1)--------- <PASS> ---------------------------------------------------------------- PF CH Value[LSB]([V]) L-Limit[LSB]([V]) U-Limit[LSB]([V]) ---------------------------------------------------------------- P 1 0x7fc1(+0.00240) 0x7f3b(+0.00750) 0x80c4(-0.00750) P 7 0x7fab(+0.00324) 0x7f3b(+0.00750) 0x80c4(-0.00750) P 13 0x7fca(+0.00206) 0x7f3b(+0.00750) 0x80c4(-0.00750) P 19 0x7fb5(+0.00286) 0x7f3b(+0.00750) 0x80c4(-0.00750) P 25 0x7fad(+0.00317) 0x7f3b(+0.00750) 0x80c4(-0.00750) P 31 0x7fc9(+0.00210) 0x7f3b(+0.00750) 0x80c4(-0.00750) P 37 0x7f97(+0.00401) 0x7f3b(+0.00750) 0x80c4(-0.00750) P 43 0x7fcd(+0.00195) 0x7f3b(+0.00750) 0x80c4(-0.00750) P 49 0x7fd5(+0.00164) 0x7f3b(+0.00750) 0x80c4(-0.00750) P 55 0x7fe7(+0.00095) 0x7f3b(+0.00750) 0x80c4(-0.00750) P 61 0x7fc7(+0.00217) 0x7f3b(+0.00750) 0x80c4(-0.00750) P 67 0x7fe0(+0.00122) 0x7f3b(+0.00750) 0x80c4(-0.00750) P 73 0x7fc3(+0.00233) 0x7f3b(+0.00750) 0x80c4(-0.00750) P 79 0x7fc1(+0.00240) 0x7f3b(+0.00750) 0x80c4(-0.00750) P 85 0x7fce(+0.00191) 0x7f3b(+0.00750) 0x80c4(-0.00750) P 91 0x7fca(+0.00206) 0x7f3b(+0.00750) 0x80c4(-0.00750) ---------------------------------------------------------------- measADC2 : 1:ADC Measurement Function(V=0V, RNG=X5)--------- <PASS> ---------------------------------------------------------------- PF CH Value[LSB]([V]) L-Limit[LSB]([V]) U-Limit[LSB]([V]) ---------------------------------------------------------------- P 1 0x8007(-0.00027) 0x7c28(+0.03750) 0x83d7(-0.03750) P 7 0x7f8b(+0.00446) 0x7c28(+0.03750) 0x83d7(-0.03750) P 13 0x8023(-0.00134) 0x7c28(+0.03750) 0x83d7(-0.03750) P 19 0x7f97(+0.00401) 0x7c28(+0.03750) 0x83d7(-0.03750) P 25 0x7f81(+0.00484) 0x7c28(+0.03750) 0x83d7(-0.03750) P 31 0x8019(-0.00095) 0x7c28(+0.03750) 0x83d7(-0.03750) P 37 0x7f1b(+0.00874) 0x7c28(+0.03750) 0x83d7(-0.03750) P 43 0x8014(-0.00076) 0x7c28(+0.03750) 0x83d7(-0.03750) P 49 0x803b(-0.00225) 0x7c28(+0.03750) 0x83d7(-0.03750) P 55 0x809f(-0.00607) 0x7c28(+0.03750) 0x83d7(-0.03750) P 61 0x8004(-0.00015) 0x7c28(+0.03750) 0x83d7(-0.03750) P 67 0x805d(-0.00355) 0x7c28(+0.03750) 0x83d7(-0.03750) P 73 0x7fe7(+0.00095) 0x7c28(+0.03750) 0x83d7(-0.03750) P 79 0x7fd8(+0.00153) 0x7c28(+0.03750) 0x83d7(-0.03750) P 85 0x8005(-0.00019) 0x7c28(+0.03750) 0x83d7(-0.03750) P 91 0x7fec(+0.00076) 0x7c28(+0.03750) 0x83d7(-0.03750) ---------------------------------------------------------------- measADC3 : 1:ADC Measurement Function(V=0V, RNG=X10)-------- <PASS> ---------------------------------------------------------------- PF CH Value[LSB]([V]) L-Limit[LSB]([V]) U-Limit[LSB]([V]) ---------------------------------------------------------------- P 1 0x805e(-0.00359) 0x7851(+0.07500) 0x87ae(-0.07500) P 7 0x7f66(+0.
YOKOGAWA ST 6730 est un équipement de test en circuit entièrement automatisé conçu pour le test final en circuit. Il s'agit d'un système haute vitesse et haute précision qui offre des capacités complètes de test de circuit pour assurer la conformité aux exigences. L'unité dispose d'une architecture multi-sites avec jusqu'à 16 sites de test dans un seul cadre, permettant de tester efficacement des cartes de circuit plus grandes et plus complexes. ST 6730 utilise des technologies innovantes telles que l'imagerie 3D et la tomographie d'impédance électrique pour des tests plus rapides et plus précis des composants. La machine est équipée d'un contrôleur de test à grande vitesse avec des capacités de traitement de données à grande vitesse et de transfert de données pour améliorer les performances globales de test. Le contrôleur de test est également équipé d'une technologie intelligente de grattage de données pour réduire le temps nécessaire pour stocker les résultats des tests et les analyser. YOKOGAWA ST 6730 dispose également d'une matrice de commutation multi-canaux haute vitesse et haute précision pour permettre des réglages de test plus complexes. ST 6730 est un outil polyvalent qui peut être personnalisé pour répondre aux besoins des tests individuels. Il dispose d'une interface utilisateur graphique intuitive, qui permet aux utilisateurs de créer et de modifier facilement des programmes de test ainsi que de surveiller le processus de test en temps réel. Pour une exécution efficace et méticuleuse des tests, l'actif est également livré avec la gamme de logiciels automatisés, qui effectue des tests de conformité et de détection des défauts sur les composants. Il permet également une gestion complète des données, l'acquisition de données et l'analyse des résultats. YOKOGAWA ST 6730 est un modèle économique avec des configurations flexibles pour répondre à différents budgets. Il offre une large gamme de programmes de soutien, d'entretien et de formation pour s'assurer que l'équipement fonctionne à ses performances optimales. Comme le système est modulaire dans sa conception, il peut être facilement amélioré pour plus de flexibilité et pour des essais plus avancés. En conclusion, le ST 6730 offre des capacités de test en circuit fiables et complètes pour diverses applications. Sa grande vitesse, sa précision et sa flexibilité en font une solution idéale pour de nombreux sites d'assemblage et de fabrication. L'unité est facile à configurer, utiliser et maintenir afin que les utilisateurs puissent être sûrs qu'ils tirent le meilleur parti de leurs investissements.
Il n'y a pas encore de critiques